An incremental aging analysis method based on delta circuit simulation technique

Si Rong He, Nguyen Cao Qui, Yu Hsuan Kuo, Chien-Nan Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

With the advance of VLSI technology, the parameter shift due to device aging has increasingly impacts on the circuit yield and reliability. Because the aging effects may degrade circuit performance and cause circuit failure after a period of time, aging analysis is also required in the design flow to avoid reliability issues. Previous aging analysis approaches often have a trade-off between accuracy and simulation time. In order to improve the efficiency of aging analysis while keeping high accuracy, this paper proposes an incremental simulation technique based on delta circuit models. Since aging process is often a gradual change, incremental simulation technique is very effective to reduce the simulation time of each iteration with almost the same accuracy. Furthermore, a dynamic aging sampling technique is also proposed to further improve the efficiency of aging analysis with little accuracy loss. As demonstrated in the experiments, the proposed approach is indeed an effective way to reduce the aging analysis time while keeping estimation accuracy.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE 26th Asian Test Symposium, ATS 2017
PublisherIEEE Computer Society
Pages60-65
Number of pages6
ISBN (Electronic)9781538624364
DOIs
StatePublished - 24 Jan 2018
Event26th IEEE Asian Test Symposium, ATS 2017 - Taipei, Taiwan
Duration: 27 Nov 201730 Nov 2017

Publication series

NameProceedings of the Asian Test Symposium
ISSN (Print)1081-7735

Conference

Conference26th IEEE Asian Test Symposium, ATS 2017
CountryTaiwan
CityTaipei
Period27/11/1730/11/17

Keywords

  • Aging analysis
  • Delta circuit
  • Incremental simulation

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  • Cite this

    He, S. R., Qui, N. C., Kuo, Y. H., & Liu, C-N. (2018). An incremental aging analysis method based on delta circuit simulation technique. In Proceedings - 2017 IEEE 26th Asian Test Symposium, ATS 2017 (pp. 60-65). (Proceedings of the Asian Test Symposium). IEEE Computer Society. https://doi.org/10.1109/ATS.2017.24