An implementation of parallel dynamic load balancing for adaptive computing in VLSI device simulation

Yi-Ming Li, Cheng Kai Chen, Shui Sheng Lin, Tien Sheng Chao, Jinn Liang Lin, S. M. Sze

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

A new parallel semiconductor device simulation using the dynamic load balancing approach is presented. This semiconductor device simulation based on adaptive finite volume error estimation, and monotone iterative methods has been developed and implemented on a Linux-cluster with MPI library. Two different parallel versions of the algorithm to perform a complete device simulation are proposed. The first one is a dynamic parallel domain decomposition approach. The second version is a parallel current-voltage characteristic points simulation. The implementation shows that a well-designed load balancing simulation can reduce the execution time up to an order of magnitude. Compared with the measured data, numerical simulations on P-N diode, N-MOSFET, and DTMOS devices are presented to show the accuracy and efficiency of the method.

Original languageEnglish
Title of host publicationProceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)0769509908, 9780769509907
DOIs
StatePublished - 1 Jan 2001
Event15th International Parallel and Distributed Processing Symposium, IPDPS 2001 - San Francisco, United States
Duration: 23 Apr 200127 Apr 2001

Publication series

NameProceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001

Conference

Conference15th International Parallel and Distributed Processing Symposium, IPDPS 2001
CountryUnited States
CitySan Francisco
Period23/04/0127/04/01

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