An ESD-protected 5-GHz differential low-noise amplifier in a 130-nm CMOS process

Yuan Wen Hsiao*, Ming-Dou Ker

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

6 Scopus citations

Abstract

A novel ESD protection design for radio-frequency (RF) differential input/output (I/O) pads is proposed and successfully applied to a 5-GHz differential low-noise amplifier (LNA) in a 130-nm CMOS process. In the proposed ESD protection design, an ESD bus and a local ESD clamp device are added between the differential input pads to quickly bypass ESD current, especially under the pin-to-pin ESD-stress condition. With 10.3-mW power consumption under 1.2-V power supply, the differential LNA with the proposed ESD protection design has the human-bodymodel (HBM) ESD robustness of 3 kV, and exhibits 18-dB power gain and 2.62-dB noise figure at 5 GHz. Experimental results have demonstrated that the proposed ESD protection circuit can be co-designed with the input matching network of LNA to simultaneously achieve excellent RF performance and high ESD robustness.

Original languageEnglish
Article number4672066
Pages (from-to)233-236
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
DOIs
StatePublished - 26 Dec 2008
EventIEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States
Duration: 21 Sep 200824 Sep 2008

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