@inproceedings{2a556f33f3bc4cc5b3c3230916589c4b,
title = "An energy-efficient 10T SRAM-based FIFO memory operating in near-/sub-threshold regions",
abstract = "In this paper, an ultra-low power (ULP) 16Kb SRAM-based first-in first-out (FIFO) memory is proposed for wireless body area networks (WBANs). The proposed FIFO memory is capable of operating in ultra-low voltage (ULV) regime with high variation immunity. An ULP near-/sub-threshold 10 transistors (10T) SRAM bit-cell is proposed to be the storage element for improving write variation in ULV regime and eliminate the data-dependent bit-line leakage. The proposed SRAM-based FIFO memory also features adaptive power control circuit, counter-based pointers, and a smart replica read/write control unit. The proposed FIFO is implemented to achieve a minimum operating voltage of 400mV in UMC 90nm CMOS technology. The write power is 2.09W at 50kHz and the read power is 2.25W at 625kHz.",
author = "Du, {Wei Hung} and Chang, {Ming Hung} and Yang, {Hao Yi} and Wei Hwang",
year = "2011",
month = dec,
day = "28",
doi = "10.1109/SOCC.2011.6085069",
language = "English",
isbn = "9781457716164",
series = "International System on Chip Conference",
pages = "19--23",
booktitle = "Proceedings - IEEE International SOC Conference, SOCC 2011",
note = "null ; Conference date: 26-09-2011 Through 28-09-2011",
}