An efficient, wide-output, high-voltage charge pump with a stage selection circuit realized in a low-voltage CMOS process

Zhicong Luo, Li Chin Yu, Ming-Dou Ker*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

A wide-output, power-efficient, high-voltage charge pump with a variable number of stages is proposed and realized in a 0.18 μm 1.8 V/3.3 V CMOS process. The proposed stage selection circuit changes the node voltages in the charge pump circuit in a domino effect to ensure that the maximum voltages across the terminals of each transistor are kept within the normal supply voltage (VDD). The stage selection circuit is able to bypass or activate each stage of the charge pump. Experimental results indicate that the proposed charge pump provides a wide-output voltage range: 3.3-12.6 V from a 3.3 V input source. A peak efficiency of 70% was reached in the charge pump at a current loading of 3.5 mA. By selecting the optimal number of active stages, the overall power efficiencies can be greater than 60% under the output voltages of 4.8 V, 8.1 V, and 10.8 V, respectively. By optimizing the number of active stages, an increase of up to 35% power efficiency can be gained. The proposed stage selection circuit is applicable to other on-chip wide-output charge-pumps.

Original languageEnglish
Article number8755481
Pages (from-to)3437-3444
Number of pages8
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume66
Issue number9
DOIs
StatePublished - 1 Sep 2019

Keywords

  • charge pump
  • high-voltage
  • power-efficient
  • stage selection circuit
  • Wide-output

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