An efficient parasitic de-embedding technique for S-parameter characterization of silicon-based RF/microwave devices

Yueh Hua Wang*, Ming Hsiang Cho, Lin-Kun Wu

*Corresponding author for this work

Research output: Contribution to journalArticle

Abstract

In this paper, an efficient S-parameter de-embedding methodology is proposed for on-wafer device characterization in the RF/microwave regime. The proposed de-embedding procedure utilizes one open and one thru dummy structure to eliminate the parasitic effects from the probe pads and the input/output interconnects of a device-under-test (DUT), respectively. By combining the transmission-line theory and the cascade-configuration concept, this method can generate the scalable distributed interconnect parameters to efficiently and precisely remove the redundant parasitics of both active and passive devices with various device sizes and arbitrary interconnect dimensions. The interconnect scalability is validated with measurements on thru samples of different lengths (50 - 500 μm) and its performance limitation owing to forward coupling is also discussed. The proposed method is demonstrated up to 20 GHz and compared with the conventional cascade-based method using the MOSFETs and spiral inductors fabricated in a 0.25 μm CMOS technology.

Original languageEnglish
Pages (from-to)111-116
Number of pages6
JournalWSEAS Transactions on Electronics
Volume3
Issue number3
StatePublished - 1 Mar 2006

Keywords

  • De-embedding
  • MOSFET
  • Parasitics
  • Scattering parameters
  • Silicon
  • Spiral inductor

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