An efficient mechanism to provide full visibility for hardware debugging

Wei Hsiang Cheng*, Chin Lung Chuang, Chien-Nan Liu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Special hardware such as FPGA can provide higher simulation speed for verification. However, it is very hard to debug due to the poor visibility of internal nodes. In [4], a snapshot method was proposed to "record" the internal behaviors of an FPGA and "replay" a certain period of time in a software simulator. In the snapshot approach, we can still keep a high simulation speed with a better debugging environment. Although saving the values of all internal registers is a sufficient solution to reconstruct the simulation waveform, it is not the optimal solution for large designs. In this paper, we propose a method to reduce the number of recorded registers in the snapshot approach. Our experiments have shown that both hardware overhead and storage data can be greatly reduced by our approach, which enables the snapshot method to be applied on larger designs.

Original languageEnglish
Title of host publicationISCAS 2006
Subtitle of host publication2006 IEEE International Symposium on Circuits and Systems, Proceedings
Pages811-814
Number of pages4
DOIs
StatePublished - 1 Dec 2006
EventISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece
Duration: 21 May 200624 May 2006

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

ConferenceISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
CountryGreece
CityKos
Period21/05/0624/05/06

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  • Cite this

    Cheng, W. H., Chuang, C. L., & Liu, C-N. (2006). An efficient mechanism to provide full visibility for hardware debugging. In ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings (pp. 811-814). [1692709] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2006.1692709