An assessment of single-electron effects in multiple-gate SOI MOSFETs with 1.6-nm gate oxide near room temperature

Wei Lee*, Pin Su, Hou Yu Chen, Chang Yun Chang, Ke Wei Su, Sally Liu, Fu Liang Yang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

10 Scopus citations

Abstract

This letter provides an assessment of single-electron effects in ultrashort multiple-gate silicon-on-insulator (SOI) MOSFETs with 1.6-nm gate oxide. Coulomb blockade oscillations have been observed at room temperature for gate bias as low as 0.2 V. The charging energy, which is about 17 meV for devices with 30-nm gate length, may be modulated by the gate geometry. The multiple-gate SOI MOSFET, with its main advantage in the suppression of short-channel effects for CMOS scaling, presents a very promising scheme to build room-temperature single-electron transistors with standard silicon nanoelectronics process.

Original languageEnglish
Pages (from-to)182-184
Number of pages3
JournalIEEE Electron Device Letters
Volume27
Issue number3
DOIs
StatePublished - 1 Mar 2006

Keywords

  • CMOS
  • Coulomb blockade oscillation
  • Multiple gate
  • Silicon-on-insulator (SOI)
  • Single-electron effect
  • Single-electron transistor

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