An ASIC architecture for real-time image/video coding based on fixed-basis-distortion vector quantization

Chen-Yi Lee, Shin Chou Juan

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Vector quantization (VQ) for real-time video/image coding often faces the challenge of processing a large amount data within a given timing constraint. However through a pre-processing of energy transformation, computation complexity and memory requirement inherent in a VQ algorithm can be reduced, leading to a very efficient ASIC architecture for real-time video/image coding. This paper first presents some optimization tasks at algorithm level by taking into account computation and memory requirements in order to ensure that a more optimal solution can be achieved. In the architecture design, distributed arithmetic (DA) technique, replacing the traditional multiplier, is exploited to perform energy computation. By exploiting pipeline and parallelism, required computations can be realized through a very regular structure. The final results show that a single-chip containing 128 codevectors can be achieved for multi-stage or full search VQ coding with reasonable area and I/O pin-count.

Original languageEnglish
Title of host publication1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1676-1679
Number of pages4
ISBN (Electronic)0780305930
DOIs
StatePublished - 1 Jan 1992
Event1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992 - San Diego, United States
Duration: 10 May 199213 May 1992

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume4
ISSN (Print)0271-4310

Conference

Conference1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
CountryUnited States
CitySan Diego
Period10/05/9213/05/92

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