An AS-DSP for forward error correction applications

Tien Yuan Hsiao*, Chien Ching Lin, Hsie-Chia Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An application specific digital signal processor for channel coding is presented. The vector operations can improve both the performance of memory accesses and program code density. The special function units and datapaths for channel decoding accelerate the decoding speed and facilitate algorithm implementation. The processor had been fabricated in a 0.18μm CMOS 1P6M technology. The chip size is 7.73 mm2 including 18k bits embedded memory, and the power consumption is 141 mW while decoding Reed-Solomon code and convolutional code. In contrast with general purpose processor designs, the results show this chip has at least 50% improvement in code density and 66% data rate enhancement.

Original languageEnglish
Title of host publicationSiPS 2005
Subtitle of host publicationIEEE Workshop on Signal Processing Systems - Design and Implementation, Proceedings
Pages609-612
Number of pages4
DOIs
StatePublished - 1 Dec 2005
EventSiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation - Athens, Greece
Duration: 2 Nov 20054 Nov 2005

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Volume2005
ISSN (Print)1520-6130

Conference

ConferenceSiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation
CountryGreece
CityAthens
Period2/11/054/11/05

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  • Cite this

    Hsiao, T. Y., Lin, C. C., & Chang, H-C. (2005). An AS-DSP for forward error correction applications. In SiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation, Proceedings (pp. 609-612). [1579938] (IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation; Vol. 2005). https://doi.org/10.1109/SIPS.2005.1579938