An ALU cluster with floating point unit for media streaming architecture with homogeneous processor cores

Chia Yi Liou*, Her-Ming Chiueh

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Recent research shows the stream processing model is suitable for portable media applications. However, previous implementations of stream processors are suffered from their power consumption and cost for chip area. Thus, these designs focus on super computer architecture and scientific computation instead of real-time media applications. This paper proposes an arithmetic logic unit (ALU) cluster with Advanced Microcontroller Bus Architecture (AMBA) platform interface, which is utilized as a reconfigurable hardware accelerator for portable media applications. The proposed design is implemented and fabricated using TSMC 0.15um technology with backend Magnetic RAM (MRAM) process integration. Floating point unit (FPU) improves 3.2 times higher averagely of performance and only increases 10.8% area overhead. The measurement result also reveals double power efficiency over previous designs using traditional architectures. Outstanding area-performance trade-off efficiency in FPU and homogeneous cores, power efficiency and design methodologies of this work contribute a turnkey solution for modern portable multimedia devices.

Original languageEnglish
Title of host publication13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008
DOIs
StatePublished - 17 Nov 2008
Event13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008 - Hsinchu, Taiwan
Duration: 4 Aug 20086 Aug 2008

Publication series

Name13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008

Conference

Conference13th IEEE Asia-Pacific Computer Systems Architecture Conference, ACSAC 2008
CountryTaiwan
CityHsinchu
Period4/08/086/08/08

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