An accurate semi-empirical saturation drain current model for LDD N-MOSFET

Kai Chen*, H. Clement Wann, Jon Duster, Dipankar Pramanik, Subhash Nariani, Ping K. Ko, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticle

28 Scopus citations

Abstract

Based on a new empirical mibility model which is solely dependent on Vgs, Vt and Tox, a coresponding semiempirical Idsat model for n-MOSFET including velocity saturation, mobility degradation due to increased vertical effective field, and source/drain series resistance of LDD structures is reported in this paper. A good agreement among the model and the measurement data from several different technologies is shown. Prediction of Idsat for the future generation of device scaling and low-power applications by using this new model is presented.

Original languageEnglish
Pages (from-to)145-147
Number of pages3
JournalIEEE Electron Device Letters
Volume17
Issue number3
DOIs
StatePublished - 1 Mar 1996

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    Chen, K., Wann, H. C., Duster, J., Pramanik, D., Nariani, S., Ko, P. K., & Hu, C-M. (1996). An accurate semi-empirical saturation drain current model for LDD N-MOSFET. IEEE Electron Device Letters, 17(3), 145-147. https://doi.org/10.1109/55.485195