An accurate and efficient high frequency noise simulation technique for deep submicron MOSFETs

Jung Suk Goo, Chang Hoon Choi, Francçois Danneville, Eiji Morifuji, Hisayo Sasaki Momose, Zhiping Yu, Hiroshi Iwai, Thomas H. Lee, Robert W. Dutton

Research output: Contribution to journalArticlepeer-review

65 Scopus citations

Abstract

Based on an active transmission line concept and two-dimensional (2-D) device simulations, an accurate and computationally efficient simulation technique for high frequency noise performance of MOSFETs is demonstrated. Using a Langevin stochastic source term model and small-signal equivalent circuit of the MOSFET, three intrinsic noise parameters (7, 6, and c) for the drain noise and induced gate noise are calculated. Validity and error analysis for the simulation are discussed by comparing the simulation results with theoretical results as well as measured data.

Original languageEnglish
Pages (from-to)2410-2419
Number of pages10
JournalIEEE Transactions on Electron Devices
Volume47
Issue number12
DOIs
StatePublished - Dec 2000

Keywords

  • Mosfets
  • Semiconductor device modeling
  • Semiconductor device noise
  • Simulation

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