An 8-channel chopper-stabilized analog front-end amplifier for EEG acquisition in 65-nm CMOS

Chung-Yu Wu, Chia Shiung Ho

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations

Abstract

An 8-channel chopper-stabilized analog front-end amplifier (AFEA) is designed in 65-nm CMOS for continuous EEG signal acquisition. The AFEA is composed of eight capacitively coupled chopper instrumentation amplifiers (CCCIAs) with chopper-stabilized circuits and band-pass filters, a multiplexed transconductor, and a transimpedance amplifier. The CCCIA employs an inverter-based folded-cascode amplifier (IBFC) to achieve a better noise-to-power tradeoff and a high gain under 1 V power supply, a DC servo loop to suppress electrode offset and provide a low high-pass corner, a low power ripple re duction loop to suppress chopping ripple, and a positive feedback loop to boost its input impedance. The fabricated AFEA has 59.1/69.8/78 dB programmable gain and 0.81 μVrms input-referred noise in a bandwidth of 0.5-100 Hz. The measured power consumption of a single CCCIA is 0.87 μW. The proposed CCCIA has a lower NEF of 2.97 than other CCCIA for EEG acquisition.

Original languageEnglish
Title of host publication2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467371919
DOIs
StatePublished - 19 Jan 2016
Event11th IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Xiamen, Fujian, China
Duration: 9 Nov 201511 Nov 2015

Publication series

Name2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings

Conference

Conference11th IEEE Asian Solid-State Circuits Conference, A-SSCC 2015
CountryChina
CityXiamen, Fujian
Period9/11/1511/11/15

Keywords

  • analog front-end
  • chopping
  • electroencephalogram (EEG)
  • low noise
  • low power
  • neural signal acquisition

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    Wu, C-Y., & Ho, C. S. (2016). An 8-channel chopper-stabilized analog front-end amplifier for EEG acquisition in 65-nm CMOS. In 2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings [7387480] (2015 IEEE Asian Solid-State Circuits Conference, A-SSCC 2015 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASSCC.2015.7387480