@inproceedings{09493e603a6f43e884de95227700dba8,
title = "An 11-bit two-stage hybrid-DAC for TFT LCD column drivers",
abstract = "This paper proposes an 11-bit two-stage hybrid-DAC for high-color-depth LCD column drivers. To save the die area, the proposed DAC is composed of a 7-bit RDAC and a 4-bit cyclic-DAC to render an 11-bit resolution. The worst DNL/INL from post-layout simulation is 0.28/0.34 LSB with 1 LSB = 2.2 mV. A three-stage class-B operational amplifier is connected as a unity-gain buffer to drive highly capacitive column lines of LCD panel. The buffer's settling time to settle within 0.2% of the final voltage is less than 4 us. This hybrid-DAC prototype is implemented using 0.35-um CMOS technology with a chip size of 1.36 mm2.",
keywords = "column driver, cyclic-DAC, DAC, LCD, operatioal amplifier",
author = "Yin, {Ping Yeh} and Lu, {Chih Wen} and Hsu, {Chih Yu} and Lin, {Yo Sheng}",
year = "2013",
doi = "10.1109/ISMS.2013.44",
language = "English",
isbn = "9780769549637",
series = "Proceedings - International Conference on Intelligent Systems, Modelling and Simulation, ISMS",
pages = "631--635",
booktitle = "Proceedings - 4th International Conference on Intelligent Systems, Modelling and Simulation, ISMS 2013",
note = "null ; Conference date: 29-01-2013 Through 31-01-2013",
}