All digital linear voltage regulator for super-to near-threshold operation

Wei Chih Hsieh*, Wei Hwang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

17 Scopus citations


In this paper, an all digital push-pull linear voltage regulator is proposed that consists of a digital error detector, a voltage divider, a mode indicator, a pull device, and grouped push devices. The digital regulator is suitable for super-to near-threshold region operation by providing a variable output voltage that ranges from 0.5 to 1 V in steps of 0.1 V. The maximum load current is 100 mA for every output level. The current efficiency is 99.8% with only 164.5 μ A quiescent current on UMC 65-nm standard CMOS technology. A response time constraint is developed to provide a design guideline for (all) the digital control system. It describes the correlation between required speed of the digital control system, the output performance and the size of the decoupling capacitor. A time interleaving control technique is then proposed to have a tradeoff between output performance, quiescent current, and the size of decoupling capacitor.

Original languageEnglish
Article number5767535
Pages (from-to)989-1001
Number of pages13
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number6
StatePublished - 1 Jan 2012


  • Current efficiency
  • Digital
  • Linear regulator
  • Push-pull
  • Response time constraint
  • Time interleaving

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