All digital built-in delay and crosstalk measurement for on-chip buses

Chau-Chin Su, Yue Tsang Chen, Mu Jeng Huang, Gen Nan Chen, Chung Len Lee

Research output: Contribution to journalConference articlepeer-review

22 Scopus citations

Abstract

This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers, and wires. The crosstalk profile is plotted by monitoring the changes in delay with the presence of the crosstalk. The distinguished features include all digital design and low hardware overhead. The SPICE simulation results prove the feasibility of the methodology.

Original languageEnglish
Article number840836
Pages (from-to)527-531
Number of pages5
JournalProceedings -Design, Automation and Test in Europe, DATE
DOIs
StatePublished - 1 Dec 2000
EventDesign, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000 - Paris, France
Duration: 27 Mar 200030 Mar 2000

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