This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers, and wires. The crosstalk profile is plotted by monitoring the changes in delay with the presence of the crosstalk. The distinguished features include all digital design and low hardware overhead. The SPICE simulation results prove the feasibility of the methodology.
|Number of pages||5|
|Journal||Proceedings -Design, Automation and Test in Europe, DATE|
|State||Published - 1 Dec 2000|
|Event||Design, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000 - Paris, France|
Duration: 27 Mar 2000 → 30 Mar 2000