Algorithm and architecture design of bandwidth-oriented motion estimation for real-time mobile video applications

Jui Hung Hsieh*, Tian-Sheuan Chang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

This paper proposes a data bandwidth-oriented motion estimation design for resource-limited mobile video applications using an integrated bandwidth rate distortion optimization framework. This framework predicts and allocates the appropriate data bandwidth for motion estimation under a limited bandwidth supply to fit a dynamically changing bandwidth supply. The simulation results show that our proposed algorithm can achieve 66% and 41% memory bandwidth savings while maintaining an equivalent rate-distortion performance and meeting real-time targets, when compared with conventional approaches for low-motion and high-motion D1 (704,×, 576)-size video, respectively. The final implementation costs 122 K gate counts with TSMC 0.13-mu m CMOS technology and consumes 74 mW of power for D1 resolution at 30 frames/s which is 40% of that achieved in previous designs.

Original languageEnglish
Article number6135844
Pages (from-to)33-42
Number of pages10
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume21
Issue number1
DOIs
StatePublished - 1 Jan 2013

Keywords

  • H.264/AVC
  • VLSI architecture
  • low power
  • memory bandwidth
  • motion estimation
  • video coding

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