AES-based cryptographic and biometric security coprocessor IC in 0.18-μ;m CMOS resistant to side-channel power analysis attacks

Kris Tiri*, David D. Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

23 Scopus citations

Abstract

This paper describes an embedded security coprocessor that consists of four components: an Advanced Encryption Standard (AES) based cryptographic engine, a fingerprint matching oracle, template storage, and an interface unit. Two functionally-identical coprocessors are fabricated using a TSMC 6M 0.18-μm process. The first coprocessor uses standard cells and encrypts at 3.84 Gb/s. The second coprocessor uses Wave Dynamic Differential Logic (WDDL) combined with differential routing to combat side-channel information leakage through power analysis attacks. It encrypts at 0.99 Gb/s. The coprocessor is part of a security-partitioned embedded system called ThumbPod.

Original languageEnglish
Title of host publication2005 Symposium on VLSI Circuits - Digest of Technical Papers
Pages216-219
Number of pages4
DOIs
StatePublished - 1 Dec 2005
Event2005 Symposium on VLSI Circuits - Kyoto, Japan
Duration: 16 Jun 200518 Jun 2005

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume2005

Conference

Conference2005 Symposium on VLSI Circuits
CountryJapan
CityKyoto
Period16/06/0518/06/05

Keywords

  • Advanced Encryption Standard (AES)
  • Biometrics
  • Coprocessor
  • Cryptography
  • Differential power analysis

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