Accurate performance evaluation of HEMT devices for high-speed logic applications through rigorous device modelling technique

Heng-Tung Hsu*, Chia Yuan Chang, Heng Shou Hsu, Edward Yi Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Tremendous progress has been made recently in the research of novel nanotechnology for future nano-electronic applications. Among all the possible technologies, III-V FETs particularly the heterostructure High Electron Mobility Transistors (HEMT) have demonstrated promising results to be the future device technology for high-speed logic applications. Precise evaluation of the delay performance for HEMT requires highly accurate intrinsic device models extracted from available measurements. In this paper, a rigorous device modelling technique based on 3-D full wave electromagnetic analysis of the device structure is presented. This technique is efficient and accurate, and the determined equivalent circuit model fits the measured S-parameter very well within the frequency range of interest.

Original languageEnglish
Title of host publication2007 Asia-Pacific Microwave Conference, APMC
DOIs
StatePublished - 1 Dec 2007
EventAsia-Pacific Microwave Conference, APMC 2007 - Bangkok, Thailand
Duration: 11 Dec 200714 Dec 2007

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC

Conference

ConferenceAsia-Pacific Microwave Conference, APMC 2007
CountryThailand
CityBangkok
Period11/12/0714/12/07

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