With the rapid advance in CMOS technology, the trend of the VLSI then towards system-on-chip (SOC) where design methodology, cost, and turnaround time are major issues. Concepts of intellectual property (IP) are then proposed to fit for SOC designs. Based on a DFS controller IP, a wideband digital frequency synthesizer (DFS) is proposed to fit in with the wireless LAN applications, which provides low cost and efficient design periods. A 2-stage voltage-controlled oscillator (VCO) is designed to achieve the system requirements and generates such a high-speed frequency. Its output frequency range can be from 465 MHz to 2.635 GHz with double 3.0-V supplies. Besides, a novel cell-based digital-to-voltage converter (DVC) is also proposed to solve the interface between the DFS controller IP and the VCO. The wideband DFS is fabricated in 0.35-um SPQM CMOS technology.