A versatile multimedia functional unit design using the spurious power suppression technique

Kuan Hung Chen*, Yu Min Chen, Yuan Sun Chu, Jiun-In  Guo

*Corresponding author for this work

Research output: Contribution to conferencePaper

13 Scopus citations

Abstract

This paper presents a Versatile Multimedia Functional Unit (VMFU) which can compute six arithmetic operations, i.e. addition, subtraction, multiplication, MAC, interpolation, and SAD with different configurations. The VMFU is constructed on the basis of a row-based modified Booth encoding multiplier which consumes the lowest power among others according to our transistor-level simulations. Besides, we apply the Spurious Power Suppression Technique (SPST) to the proposed VMFU to decrease the wasted dynamic power dissipation. From the transistor-level simulations, the proposed VMFU dissipates 0.0142 mW/MHz under a 0.18um/1.8V CMOS technology. Adopting the SPST can reduce 24% power consumption with only a 15% area overhead.

Original languageEnglish
Pages111-114
Number of pages4
DOIs
StatePublished - 1 Dec 2006
Event2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China
Duration: 13 Nov 200615 Nov 2006

Conference

Conference2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
CountryChina
CityHangzhou
Period13/11/0615/11/06

Keywords

  • Low-power
  • Multimedia
  • Versatile
  • VLSI design

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    Chen, K. H., Chen, Y. M., Chu, Y. S., & Guo, J-I. (2006). A versatile multimedia functional unit design using the spurious power suppression technique. 111-114. Paper presented at 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China. https://doi.org/10.1109/ASSCC.2006.357864