A unified systolic architecture for combined inter and intra predictions in H.264/AVC decoder

Chih Hung Li*, Chih Chieh Chen, Wei Chi Su, Ming Jiun Wang, Wen-Hsiao Peng, Tihao Chiang, Gwo Giun Lee

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper presents a unified systolic architecture for inter and intra predictions in H.264/AVC decoder. To increase hardware utilization and minimize cost, we combine inter and intra predictions by a reprogrammable FIR filter, which is further implemented using systolic array. For intra prediction, the boundary pixels are reshuffled before feeding into the systolic array. For inter prediction, the 2-D interpolation is conducted through separable 1-D filtering. As compared with the state-of-the-art approaches, our architecture provides higher performance while maintaining relatively lower cost and input bandwidth. Specifically, up to 4× throughput improvement has been achieved. Moreover, the input bandwidth is significantly reduced. Further, combining inter and intra predictions saves the cost by 22-88%.

Original languageEnglish
Title of host publicationIWCMC 2006 - Proceedings of the 2006 International Wireless Communications and Mobile Computing Conference
Pages73-78
Number of pages6
DOIs
StatePublished - 1 Dec 2006
EventIWCMC 2006 - 2006 International Wireless Communications and Mobile Computing Conference - Vancouver, BC, Canada
Duration: 3 Jul 20066 Jul 2006

Publication series

NameIWCMC 2006 - Proceedings of the 2006 International Wireless Communications and Mobile Computing Conference
Volume2006

Conference

ConferenceIWCMC 2006 - 2006 International Wireless Communications and Mobile Computing Conference
CountryCanada
CityVancouver, BC
Period3/07/066/07/06

Keywords

  • H.264
  • Intra prediction
  • Motion compensation

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