We present our approach to developing a unified SOI MOSFET model for circuit designs using state-of-the-art SOI technologies. Using BSIMPD as a foundation, we unify the PD and FD models by the concept of body-source built-in potential lowering. This unification is crucial due to the coexistence of PD/FD devices in a single chip as well as the coexistence of PD/FD behavior in a single device. The unified BSIMSOI model has been implemented in Berkeley SPICE3f4 and many commercial circuit simulators.
|Number of pages||4|
|Journal||Proceedings of the Custom Integrated Circuits Conference|
|State||Published - 19 Nov 2003|
|Event||Proceedings of the IEEE 2003 Custom Integrated Circuits Conference - San Jose, CA, United States|
Duration: 21 Sep 2003 → 24 Sep 2003