A single-inductor dual-output (SIDO) converter with the switchable digital-or-analog (D/A) low-dropout (LDO) regulator achieves an analog dynamic voltage scaling (ADVS) function for ripple suppression and high efficiency in system-on-a-chip (SoC). The ADVS function helps dynamically adjust the dropout voltage of the switchable D/A LDO regulator with analog operation for ripple suppression according to the load current. On other hand, the switchable D/A LDO regulator activates the digital operation for high efficiency at light loads since the dropout voltage of the LDO regulator can be further reduced. Besides, the bidirectional asynchronous signal pipeline (BASP) can realize the 50nA quiescent current in digital LDO regulator. This chip was fabricated by the 40 nm CMOS process. Experimental results demonstrate the switchable LDO regulator operation with the peak efficiency of 92% and the 7 mV output voltage ripple at 200 mA load because of the ripple suppression. The efficiency can be kept higher than 83% even the load current is 1 mA.
|Number of pages||4|
|State||Published - 1 Dec 2012|
|Event||2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012 - Kobe, Japan|
Duration: 12 Nov 2012 → 14 Nov 2012
|Conference||2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012|
|Period||12/11/12 → 14/11/12|