A simulation-based hybrid optimization technique for analog and digital integrated circuits design automation

Yiming Li*, Shao Ming Yu, Yih Lang Li

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

In this paper, a simulation-based optimization technique for integrated circuit (IC) design automation is presented. Based on biological inspired techniques, numerical deterministic methods and circuit simulator, the hybrid optimization methodology is developed for IC design. Two different circuits, low noise amplifier (LNA) and static random access memory (SRAM) are analyzed with our technique. Considering LNA IC, we simultaneously evaluate specifications including S parameters, K factor, noise figure, and input third-order intercept point in the optimization process. If the simulated results meet the aforementioned constraints, we output the optimized parameters. Otherwise, one of evolutionary algorithms will enable us to search solution globally; simultaneously, numerical optimization methods solve the solutions according to the results of global search. A circuit simulator calculates the circuit's characteristics with the updated configurations, and the developed prototype will evaluate newer results until all specifications are matched. Similarly, by considering the static noise margin (SNM), optimal device's channel length and supply voltage for SRAM cells with different circuit types could be tuned. Our preliminary results confirm the robustness and efficiency of the proposed simulationbased optimization technique.

Original languageEnglish
Title of host publication2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007, Technical Proceedings
Pages181-184
Number of pages4
StatePublished - 24 Aug 2007
Event2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007 - Santa Clara, CA, United States
Duration: 20 May 200724 May 2007

Publication series

Name2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007, Technical Proceedings
Volume3

Conference

Conference2007 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2007
CountryUnited States
CitySanta Clara, CA
Period20/05/0724/05/07

Keywords

  • Analog circuit
  • Circuit design
  • Circuit tuning
  • Design automation
  • Digital circuit
  • Hybrid optimization
  • Integrated circuit
  • Low noise amplifier
  • Methodology
  • Simulation-based
  • Static random access memory

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