A Simple Punchthrough Model for Short-Channel MOSFET's

Fu Chieh Hsu, Richard S. Muller, Chen-Ming Hu

Research output: Contribution to journalArticle

19 Scopus citations

Abstract

Punchthrough currents impose severe limitations on the minimum channel length and leakage currents of scaled MOS transistors. A simple model is proposed to calculate the low-level punchthrough characteristics. Taking into account the two-dimensional geometr cal effects, this model calculates the drain-induced barrier-lowering (DIBL) and the punchthrough current as a function of the processing parameters, and the gate, drain, and substrate bias. Experiments on devices with substrate dopings 6 × 1014 and 6.6 × 1015 cm-3 and channel lengths from 1 to 2 µm show good agreement with the theory.

Original languageEnglish
Pages (from-to)1354-1359
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume30
Issue number10
DOIs
StatePublished - 1 Jan 1983

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