A serial scan test vector compression methodology

Chau-Chin Su*, Kychin Hwang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

36 Scopus citations

Abstract

This paper presents a serial scan test vector compression methodology for the test time reduction in a scan-based test environment. The reduction is achieved by the overlapping of two consecutive vectors. Hence, the order of test vectors determines the amount of reduction in time. Here, two test vector ordering algorithms, depth first greedy and coalesced simple orders algorithms, have been derived, implemented, and tested. Experimental results obtained are very close to estimations by statistical analysis.

Original languageEnglish
Title of host publicationProceedings of the International Test Conference
Editors Anon
PublisherPubl by IEEE
Pages981-988
Number of pages8
ISBN (Print)0780314298
DOIs
StatePublished - 1 Dec 1993
EventProceedings of the 24th IEEE International Test Conference - Baltimore, MD, USA
Duration: 17 Oct 199321 Oct 1993

Publication series

NameProceedings of the International Test Conference

Conference

ConferenceProceedings of the 24th IEEE International Test Conference
CityBaltimore, MD, USA
Period17/10/9321/10/93

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