A serial link transceiver for USB2 high-speed mode

Shyh-Jye Jou, Shu Hua Kuo, Jui Ta Chiu, Chu King, Chien Hsiung Lee, Tim Liu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

The Universal Serial Bus (USB) technology is now becoming an integral part of the personal computer platform. In this paper, the transceiver architecture and circuits are proposed and implemented for USB2 high-speed mode with 480 Mb/s bandwidth. This physical layer of USB2 consists of transmitter, receiver, two envelope detectors and an all-digital clock recovery/data synchronization blocks. It has been implemented with UMC 0.35 /spl mu/m 1P4M 3.3 V CMOS technology and consumes only 156 mW.

Original languageEnglish
Title of host publicationISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages72-75
Number of pages4
DOIs
StatePublished - 1 Dec 2001
Event2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
Duration: 6 May 20019 May 2001

Publication series

NameISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume4

Conference

Conference2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
CountryAustralia
CitySydney, NSW
Period6/05/019/05/01

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