A self-synchronized RF-interconnect for 3-dimensional integrated circuits

Qun Gu*, Zhiwei Xu, Jenwei Ko, Szukang Hsien, Mau-Chung Chang

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

A self-synchronized RF-interconnect technology (SSRFI), based on capacitor coupling and peak signal detection, is presented in this paper. It can be easily implemented in 3-Dimensional ICs (3D-ICs) with small coupling capacitors (60fF) to interconnect vertical active layers. The demonstrated SSRFI system, including both transmitter and receiver, has been designed, fabricated and verified in UMC 0.18μm CMOS with a verified PRBS (Pseudo Random Binary Sequence) data rate of 3Gbit/s and a BER (Bit Error Rate) of 1.2×10 -10 . The core circuit burns about 4mW from a 1.8V supply and occupies 0.02mm 2 chip area.

Original languageEnglish
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
DOIs
StatePublished - 6 Sep 2004
Event2004 IEEE International Symposium on Circuits and Systems - Proceedings - Vancouver, BC, Canada
Duration: 23 May 200426 May 2004

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