A reliable brain computer interface implemented on FPGA for mobile dialing system

Chih Wei Feng, Jui Chung Chang, Wei Chen Chen, Wai-Chi  Fang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six buttons (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose the number by gazing at the computer interface. This proposed EEG (Electroencephalography) system has been implemented in Field-Programmable Gate Arrays (FPGA) and it features high accuracy, integration density, and low cost. These features are meaningful for implementing a real time SSVEP-based BCI.

Original languageEnglish
Title of host publication2015 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages110-111
Number of pages2
ISBN (Electronic)9781479987443
DOIs
StatePublished - 20 Aug 2015
Event2nd IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2015 - Taipei, Taiwan
Duration: 6 Jun 20158 Jun 2015

Publication series

Name2015 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2015

Conference

Conference2nd IEEE International Conference on Consumer Electronics - Taiwan, ICCE-TW 2015
CountryTaiwan
CityTaipei
Period6/06/158/06/15

Keywords

  • Accuracy
  • Bandwidth
  • Brain-computer interfaces
  • Correlation
  • Electroencephalography
  • Field programmable gate arrays
  • Visualization

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