A rail-to-rail buffer amplifier for LCD driver

Chih Wen Lu*, Ching Min Hsiao

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

3 Scopus citations


A high-speed low-power rail-to-rail buffer amplifier, which is suitable for liquid crystal display driver applications, is proposed. An offset voltage is intentionally built in the second stage to cut off the transistors of last stage from the output node in the stable state and hence achieve low dc power consumption. The input referred offset voltage due to the built-in offset is very small. The buffer draws little current while static but has a large driving capability while transient. An experimental prototype buffer amplifier implemented in a 0.35-μm CMOS technology demonstrates that the circuit can operate under a wide power supply range. Quiescent current of 5 μA is measured. The buffer exhibits the settling time of 1.5 μs for a voltage swing of 0.1 ∼ (VDD - 0.1) V under a 600 pF capacitance load. The area of this buffer is 30 × 98 μm 2. The measured data show that the proposed output buffer amplifier is very suitable for LCD driver applications.

Original languageEnglish
Pages (from-to)1377-1387
Number of pages11
JournalJournal of Circuits, Systems and Computers
Issue number7
StatePublished - Nov 2011


  • buffer amplifier
  • LCD
  • LCD driver
  • liquid crystal display
  • rail-to-rail

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