This brief presents a new process, voltage, and temperature (PVT)-independent constant-G m bias technique for any I out (V in )-monotonic convex (or concave) transconductors. In this brief, the conventional constant-g m biasing is formulated into an analog computation process that calculates the constant-G m bias voltage V 0 from an input current. An analog computer measures the effective G m from two matched transconductors and converges it to the inverse of a precision resistance by adjusting V 0 . Through this, a well-defined large-signal constant-G m bias voltage can be found. The proposed technique eliminates the power-law or exponential-law assumptions on the I out (V in ) characteristics in a conventional design. An interpolation calculation follows to find the optimal small-signal constant-g m bias voltage Vout. The fundamental limitations of the proposed technique are the required monotonicity and convexity (or concavity) of the transconductor's I out (V in ). Error sources include mismatches of paired devices and the input offset voltage and open-loop gain of the operation amplifier (OpAmp). These errors are analyzed in detail in this brief. Biasing circuits based on different transistor types are designed using the Taiwan Semiconductor Manufacturing Company (TSMC) 65-nm CMOS process. Computer simulations show that the proposed biasing circuitry can achieve ±0.22% g m variations from -60°C to 130°C.
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems I: Regular Papers|
|State||Published - 1 Oct 2014|
- Constant G
- Temperature (PVT) variation