A proposal of schottky barrier height tuning method with interface controlled Ni/Si stacked silicidation process

Y. Tamura, R. Yoshihara, K. Kakushima, P. Ahmet, Y. Kataoka, A. Nishiyama, N. Sugii, K. Tsutsui, K. Natori, T. Hattori, H. Iwai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A novel method to effectively control the Schottky barrier height has been proposed with stacked silicidation process using Ni and Si stacked structures. Owing to little reaction of NiSi2 with Si channels, encroachments of Ni atoms into channels have been inhibited, so that the position of the interface between NiSi2 and Si has been controlled. Incorporation of P or B atoms at the interface has been found to effectively change the Schottky barrier heights for electrons (-Bn) to 0.36 or 0.68 eV, respectively. Finally, ambipolar behaviors with silicided source/drain (S/D) FET have been successfully suppressed

Original languageEnglish
Title of host publicationLow-Dimensional Nanoscale Electronic and Low-Dimensional Nanoscale Electronic and on Compound Semiconductors 54, SOTAPOCS 2012
Pages25-30
Number of pages6
Edition6
DOIs
StatePublished - 2012
EventSymposia on Low-Dimensional Nanoscale Electronic and Photonic Devices 5 and State-of-the-Art Program on Compound Semiconductors 2012, SOTAPOCS 54 - 222nd ECS Meeting/PRiME 2012 - Honolulu, HI, United States
Duration: 7 Oct 201212 Oct 2012

Publication series

NameECS Transactions
Number6
Volume50
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Conference

ConferenceSymposia on Low-Dimensional Nanoscale Electronic and Photonic Devices 5 and State-of-the-Art Program on Compound Semiconductors 2012, SOTAPOCS 54 - 222nd ECS Meeting/PRiME 2012
CountryUnited States
CityHonolulu, HI
Period7/10/1212/10/12

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    Tamura, Y., Yoshihara, R., Kakushima, K., Ahmet, P., Kataoka, Y., Nishiyama, A., Sugii, N., Tsutsui, K., Natori, K., Hattori, T., & Iwai, H. (2012). A proposal of schottky barrier height tuning method with interface controlled Ni/Si stacked silicidation process. In Low-Dimensional Nanoscale Electronic and Low-Dimensional Nanoscale Electronic and on Compound Semiconductors 54, SOTAPOCS 2012 (6 ed., pp. 25-30). (ECS Transactions; Vol. 50, No. 6). https://doi.org/10.1149/05006.0025ecst