A programmable dual hysteretic window comparator

Hong Wei Huang*, Chia Hsiang Lin, Ke-Horng Chen

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

a programmable dual hysteretic window comparator is presented in this paper. The comparator uses a cascoded flipped voltage follower (CASFVF), a high speed V-I converter, and a current comparator to enhance the response time and accuracy. Moreover, the positive and negative hysteretic thresholds can be programmable, respectively. Simulation results in 0.25-μm CMOS technology demonstrate the validity of the designed approach.

Original languageEnglish
Title of host publication2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages1930-1933
Number of pages4
DOIs
StatePublished - 19 Sep 2008
Event2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
Duration: 18 May 200821 May 2008

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
CountryUnited States
CitySeattle, WA
Period18/05/0821/05/08

Keywords

  • Flipped voltage follower
  • Hysteretic comparaor
  • V-I converter

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    Huang, H. W., Lin, C. H., & Chen, K-H. (2008). A programmable dual hysteretic window comparator. In 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 (pp. 1930-1933). [4541821] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2008.4541821