A practical power model of AMBA system for high-level power analysis

Sung Che Li*, Wei Ting Liao, Mu Shun Lee, Wen Tsan Hsieh, Chien-Nan Liu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Nowadays, the communication architecture has become a major source of power consumption in complicated System-on-Chip (SoC) designs. In this paper, a practical cycle-accurate power model for on-chip communication architecture using AMBA system is proposed to help high-level power analysis. According to the distinct properties of each bus component, different methods are adopted to build accurate power models. In addition, the proposed power model can be integrated into RTL simulator easily, which allows performing the power analysis at high level. The experiment results have shown that the average error of the proposed power model is less than 5.14% and the simulation overhead is less than 8.7%.

Original languageEnglish
Title of host publication2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
Pages347-350
Number of pages4
DOIs
StatePublished - 1 Dec 2009
Event2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09 - Hsinchu, Taiwan
Duration: 28 Apr 200930 Apr 2009

Publication series

Name2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09

Conference

Conference2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
CountryTaiwan
CityHsinchu
Period28/04/0930/04/09

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