A platform-based de-blocking filter design with bus-interleaved architecture for H.264

Shih Chien Chang*, Wen-Hsiao Peng, Shih Hao Wang, Tihao Chiang

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

In this paper, we present an ARM platform-based architecture design for de-blocking filter in H.264. According to statistical analysis, we propose an adaptive transmission scheme to reduce the bus workload. Moreover, we develop a bus-interleaved architecture to reduce the processing latency. As compared to the state-of-the-art designs, our scheme offers 3x to 14x performance improvement. Furthermore, we have proved our design using an ARM emulation board.

Original languageEnglish
Article number7.3-4
Pages (from-to)293-294
Number of pages2
JournalDigest of Technical Papers - IEEE International Conference on Consumer Electronics
DOIs
StatePublished - 5 Dec 2005
Event2005 Digest of Technical Papers - International Conference on Consumer Electronics, ICCE 2005 - Las Vegas, NV, United States
Duration: 8 Jan 200512 Jan 2005

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