A pattern-based domain partition approach to parallel optical proximity correction in VLSI designs

Shao Ming Yu*, Yi-Ming Li

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

A novel parallel optical proximity correction (OPC) technique is proposed for process distortion compensation of layout mask in design and fabrication of very large scale integration (VLSI) circuits. Based on a genetic algorithm (GA), rule- and model-based correction methods, and domain decomposition algorithms, a parallel OPC system is successfully developed for the layout mask correction of VLSI circuits on a Linux-based PC cluster with the message passing interface (MPI) libraries. Tested on several layout patterns, the implemented pattern-based partition scheme shows good accuracy for the OPC-corrected layout mask of VLSI designs. Computational and parallel benchmarks, such as speedup and efficiency, are achieved and exhibit excellent performance of the developed system. Our approach provides an alternative in developing advanced computer aided design (CAD) tools and benefits design and fabrication of system-on-chip (SoC).

Original languageEnglish
Title of host publicationProceedings - 19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005
Pages1-7
Number of pages7
DOIs
StatePublished - 4 Apr 2005
Event19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005 - Denver, CO, United States
Duration: 4 Apr 20058 Apr 2005

Publication series

NameProceedings - 19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005
Volume2005

Conference

Conference19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005
CountryUnited States
CityDenver, CO
Period4/04/058/04/05

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