The optimal p-n junction structure in a state-of-the-art Cu(In,Ga)(Se,S)2 thin-film solar module technology is investigated. For co-optimization design and path-finding, a TCAD model is developed with experimental samples. The engineerable parameters, i.e., FGa, GGIavg, and CdS thickness, are demonstrated to play a critical role in determining the p-n junction properties such as dark current characteristics Jdark(V), voltage-dependent photocurrent, localized carrier collection efficiency, and interface carrier transportation. We show the optimal Ga-grading is determined by a trade-off between the recombination loss in space charge region and the photo-carrier collection in quasi-neutral region. The optimal CdS thickness is determined by a trade-off between carrier collection efficiency, short-circuit current (JSC) loss, and Jdark(V), which depends on varied Ga-profiles. Overall, thin CdS (≦10 nm) is preferred to reduce the JSC loss in accumulated Ga-profiles, while thicker CdS is preferred to enhance the carrier collection efficiency in flatter Ga-profiles. The band alignment effect on varied Cu(In,Ga)(Se,S)2/CdS junctions is also investigated. It is found sulfur-incorporation can suppress the VOC saturation behavior at wide bandgap. For CIGSeS absorber with SS = 20% and DP =15%, the maximum VOC of 780 mV can be achieved by co-optimized Ga-profile. Furthermore, varied Ga-profiles and CdS buffer layers are explored for pathfinding. An optimal p-n junction structure shows a relative +40% efficiency improvement from 15.5% to 21.9%. This work shows the efficiency headroom of reported CIGSeS thin-film solar module technology through co-optimized CIGSeS composition gradient and buffer layer.
- Solar cell