Resistance of transition metal oxide (TMO) resistive random access memory (ReRAM) depends sharply on temperature, resulting in drastic memory window loss at high temperature. Thus, it is difficult to design the ReRAM that can serve a wide range of operating conditions. It is especially challenging to achieve multi-level-cell (MLC) ReRAM because of the large temperature dependency. This letter investigates both the temperature and read bias dependencies of WOx ReRAM, and found both can be well understood by a modified space-charge limited conduction model. Using this model, we have designed a novel read scheme that varies the read bias according to the device temperature and compensates for the temperature effect on cell resistance. Since TMO ReRAM devices depend on defect states, cell-to-cell and cycle-to-cycle variations are naturally large. An algorithm is designed to address the variability. A 1-Mb WOx ReRAM array is fabricated to both characterize the bias and temperature dependencies and verify the new read scheme. A large and constant memory window is preserved for MLC across a wide temperature range (-40 °C-125 °C), suitable for high-reliability applications.
- Nonvolatile memory
- resistive random access memory
- temperature dependency