Abstract
This paper describes a novel surface-oxidized barrier-SiN cell technology to effect a tenfold improvement in endurance and read disturb characteristics. In conventional memory cells, degradation of tunnel oxides due to barrier-SiN films for Self-Aligned Contact (SAC) limits the scaling of memory cells. The proposed technology overcomes this problem by an additional oxidation process subsequent to barrier-SiN deposition to reduce hydrogen in both SiN film and tunnel oxide. 0.18μm-rule NAND cells fabricated by the proposed technology demonstrate a tenfold improvement in allowable program/erase cycles and read disturb lifetime without any deterioration of other cell properties.
| Original language | English |
|---|---|
| Pages (from-to) | 771-774 |
| Number of pages | 4 |
| Journal | Technical Digest - International Electron Devices Meeting |
| DOIs | |
| State | Published - 1 Dec 2000 |
| Event | 2000 IEEE International Electron Devices Meeting - San Francisco, CA, United States Duration: 10 Dec 2000 → 13 Dec 2000 |
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Goda, A., Moriyama, W., Hazama, H., Iizuka, H., Shimizu, K., Aritome, S., & Shirota, R. (2000). A novel surface-oxidized barrier-SiN cell technology to improve endurance and read-disturb characteristics for gigabit NAND flash memories. Technical Digest - International Electron Devices Meeting, 771-774. https://doi.org/10.1109/IEDM.2000.904431