A novel poly-Si thin-film transistor with a self-aligned SiGe raised source/drain (SiGe-RSD TFT) has been proposed and fabricated. The SiGe-RSD regions were grown selectively by the ultra-high vacuum chemical vapor deposition (UHVCVD) process designed by us at 550°C. The resultant transistor structure features an ultra-thin active channel region (20 nm) and a self-aligned thick source/drain region (120 nm), and is ideally suited for optimum performance. Significant improvements in electrical characteristics, such as higher turn-on current, lower leakage current and higher drain breakdown voltage have been observed in the SiGe RSD TFT, compared to its conventional TFT counterpart. Moreover, the process is simple and no additional masks are necessary, which is consistent with conventional fabrication processes.
|Number of pages||4|
|Journal||Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers|
|State||Published - 1 Mar 2003|
- Raised source drain
- Thin-film transistor
- Ultra thin