A novel register organization for VLIW digital signal processors

Tay Jyi Lin*, Chen Chia Lee, Chih-Wei Liu, Chein Wei Jen

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

This paper presents a novel register organization for VLIW DSPs. The simulation results show the performance of a DSP with the proposed register file is comparable with state-of-the-art DSPs. However, the proposed register file can save 89.7% area of a conventional centralized one, while reducing its access time by 68.6%.

Original languageEnglish
Title of host publication2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
Pages337-340
Number of pages4
DOIs
StatePublished - 1 Dec 2005
Event2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) - Hsinchu, Taiwan
Duration: 27 Apr 200529 Apr 2005

Publication series

Name2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
Volume2005

Conference

Conference2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
CountryTaiwan
CityHsinchu
Period27/04/0529/04/05

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    Lin, T. J., Lee, C. C., Liu, C-W., & Jen, C. W. (2005). A novel register organization for VLIW digital signal processors. In 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) (pp. 337-340). [1500090] (2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT); Vol. 2005). https://doi.org/10.1109/VDAT.2005.1500090