A Novel Process for High-Performance Schottky Barrier PMOS

A novel process for high-performance rinsed asymmetric Schottky barrier PMOS transistors with a Schottky barrier junction source and a P-N junction drain is proposed. PtSi is used to form the source Schottky junction. No spacer oxide is necessary for this process to isolate the poly-Si gate and the source PtSi; thus the source PtSi may directly contact the inverted channel. Measured results show that the new Schottky barrier PMOS can circumvent the drawback of the conventional Schottky barrier PMOS, such as low drain driving current, poor transconductance, and high drain to substrate leakage current.