A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications

C. C. Yeh; Ta-Hui Wang; Y. Y. Liao; W. J. Tsai; T. C. Lu; M. S. Chen; Y. R. Chen; K. F. Chen; Z. T. Han; M. S. Wong; S. M. Hsu; N. K. Zous; T. F. Ou; Wenchi Ting; Joseph Ku; Chih Yuan Lu

doi:10.1109/.2005.1469234

A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications

C. C. Yeh, Ta-Hui Wang, Y. Y. Liao, W. J. Tsai, T. C. Lu, M. S. Chen, Y. R. Chen, K. F. Chen, Z. T. Han, M. S. Wong, S. M. Hsu, N. K. Zous, T. F. Ou, Wenchi Ting, Joseph Ku, Chih Yuan Lu

Department of Electronics Engineering

Research output: Contribution to journal › Conference article › peer-review

9 Scopus citations

Abstract

A novel NAND-type PHINES nitride trapping storage flash memory cell is proposed for the first time. PHINES memory cells use a SONOS cell structure, and are arranged in a modified NAND array. FN electron injection and band-to-band (BTB) hot-hole (HH) injection are utilized as the erase and the program operations, respectively. Read is performed by a novel BTB current sensing scheme. Physically 2-bits-per-cell storage, low power operation, and a high programming throughput are demonstrated.

Original language	English
Article number	1469234
Pages (from-to)	116-117
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2005
DOIs	https://doi.org/10.1109/.2005.1469234
State	Published - 1 Dec 2005
Event	2005 Symposium on VLSI Technology - Kyoto, Japan Duration: 14 Jun 2005 → 14 Jun 2005

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Yeh, C. C., Wang, T-H., Liao, Y. Y., Tsai, W. J., Lu, T. C., Chen, M. S., Chen, Y. R., Chen, K. F., Han, Z. T., Wong, M. S., Hsu, S. M., Zous, N. K., Ou, T. F., Ting, W., Ku, J., & Lu, C. Y. (2005). A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications. Digest of Technical Papers - Symposium on VLSI Technology, 2005, 116-117. [1469234]. https://doi.org/10.1109/.2005.1469234

Yeh, C. C. ; Wang, Ta-Hui ; Liao, Y. Y. ; Tsai, W. J. ; Lu, T. C. ; Chen, M. S. ; Chen, Y. R. ; Chen, K. F. ; Han, Z. T. ; Wong, M. S. ; Hsu, S. M. ; Zous, N. K. ; Ou, T. F. ; Ting, Wenchi ; Ku, Joseph ; Lu, Chih Yuan. / A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications. In: Digest of Technical Papers - Symposium on VLSI Technology. 2005 ; Vol. 2005. pp. 116-117.

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title = "A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications",

abstract = "A novel NAND-type PHINES nitride trapping storage flash memory cell is proposed for the first time. PHINES memory cells use a SONOS cell structure, and are arranged in a modified NAND array. FN electron injection and band-to-band (BTB) hot-hole (HH) injection are utilized as the erase and the program operations, respectively. Read is performed by a novel BTB current sensing scheme. Physically 2-bits-per-cell storage, low power operation, and a high programming throughput are demonstrated.",

author = "Yeh, {C. C.} and Ta-Hui Wang and Liao, {Y. Y.} and Tsai, {W. J.} and Lu, {T. C.} and Chen, {M. S.} and Chen, {Y. R.} and Chen, {K. F.} and Han, {Z. T.} and Wong, {M. S.} and Hsu, {S. M.} and Zous, {N. K.} and Ou, {T. F.} and Wenchi Ting and Joseph Ku and Lu, {Chih Yuan}",

year = "2005",

month = dec,

day = "1",

doi = "10.1109/.2005.1469234",

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journal = "Digest of Technical Papers - Symposium on VLSI Technology",

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note = "null ; Conference date: 14-06-2005 Through 14-06-2005",

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Yeh, CC, Wang, T-H, Liao, YY, Tsai, WJ, Lu, TC, Chen, MS, Chen, YR, Chen, KF, Han, ZT, Wong, MS, Hsu, SM, Zous, NK, Ou, TF, Ting, W, Ku, J & Lu, CY 2005, 'A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications', Digest of Technical Papers - Symposium on VLSI Technology, vol. 2005, 1469234, pp. 116-117. https://doi.org/10.1109/.2005.1469234

A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications. / Yeh, C. C.; Wang, Ta-Hui; Liao, Y. Y.; Tsai, W. J.; Lu, T. C.; Chen, M. S.; Chen, Y. R.; Chen, K. F.; Han, Z. T.; Wong, M. S.; Hsu, S. M.; Zous, N. K.; Ou, T. F.; Ting, Wenchi; Ku, Joseph; Lu, Chih Yuan.

In: Digest of Technical Papers - Symposium on VLSI Technology, Vol. 2005, 1469234, 01.12.2005, p. 116-117.

Research output: Contribution to journal › Conference article › peer-review

TY - JOUR

T1 - A novel NAND-type PHINES nitride trapping storage flash memory cell with physically 2-bits-per-cell storage, and a high programming throughput for mass storage applications

AU - Yeh, C. C.

AU - Wang, Ta-Hui

AU - Liao, Y. Y.

AU - Tsai, W. J.

AU - Lu, T. C.

AU - Chen, M. S.

AU - Chen, Y. R.

AU - Chen, K. F.

AU - Han, Z. T.

AU - Wong, M. S.

AU - Hsu, S. M.

AU - Zous, N. K.

AU - Ou, T. F.

AU - Ting, Wenchi

AU - Ku, Joseph

AU - Lu, Chih Yuan

PY - 2005/12/1

Y1 - 2005/12/1

N2 - A novel NAND-type PHINES nitride trapping storage flash memory cell is proposed for the first time. PHINES memory cells use a SONOS cell structure, and are arranged in a modified NAND array. FN electron injection and band-to-band (BTB) hot-hole (HH) injection are utilized as the erase and the program operations, respectively. Read is performed by a novel BTB current sensing scheme. Physically 2-bits-per-cell storage, low power operation, and a high programming throughput are demonstrated.

AB - A novel NAND-type PHINES nitride trapping storage flash memory cell is proposed for the first time. PHINES memory cells use a SONOS cell structure, and are arranged in a modified NAND array. FN electron injection and band-to-band (BTB) hot-hole (HH) injection are utilized as the erase and the program operations, respectively. Read is performed by a novel BTB current sensing scheme. Physically 2-bits-per-cell storage, low power operation, and a high programming throughput are demonstrated.

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JO - Digest of Technical Papers - Symposium on VLSI Technology

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SN - 0743-1562

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Y2 - 14 June 2005 through 14 June 2005

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