A novel low-temperature polysilicon thin-film transistors with a self-aligned gate and raised source/drain formed by the damascene process

Kow-Ming Chang*, Gin Min Lin, Guo Liang Yang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

In this letter, a novel structure of the polycrystalline silicon thin-film transistors (TFTs) with a self-aligned gate and raised source/ drain (RSD) formed by the damascene process has been developed and investigated. Comparing with the conventional coplanar TFT, the proposed RSD TFT has a remarkable lower off-state current (177 to 6.29 nA), and the on/off current ratio is only slightly decreased from 1.71 times 10 7 to 1.39 times 10 7 . Only four photomasking steps are required. This novel structure is an excellent candidate for further high-performance large-area device applications.

Original languageEnglish
Pages (from-to)806-808
Number of pages3
JournalIEEE Electron Device Letters
Volume28
Issue number9
DOIs
StatePublished - 1 Dec 2007

Keywords

  • Damascene process
  • Four masks
  • On/off current ratio
  • Polycrystalline silicon thin-film transistor (poly-Si TFT)
  • Raised source/drain (RSD)
  • Self-aligned gate
  • Thin channel

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