A novel self-aligned process for high cell density trench gate power MOSFETs with only four mask layers was proposed. The specific on-resistance can be as low as 0.21 mΩ-cm2 with 1.5um cell pitch and 35V breakdown voltage. Because this process shrinks trench space but not trench width, the quasi-saturation phenomenon is lighter. After optimization the thickness of n- drift layer and n+ substrate, specific on-resistance lower than 0.1 mΩ-cm2 with 0.6um technology could be expected.
|Number of pages||4|
|State||Published - 18 Oct 2004|
|Event||Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs (ISPSD'04) - Kitakyushu, Japan|
Duration: 24 May 2004 → 27 May 2004
|Conference||Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs (ISPSD'04)|
|Period||24/05/04 → 27/05/04|