A novel nonvolatile memory cell named programmable resistor with eraseless memory (PREM) is proposed for system on chip applications for the first time. PREM combines a novel "eraseless" algorithm and the progressive breakdown of an ultrathin oxide. No or one extra mask is needed with a standard CMOS process. Multitime programming, multilevel cell, nonvolatility, and low-voltage operation are realized. Good reliability is demonstrated based on the result of a single cell.
- Multilevel cell (MLC)
- Multitime programming (MTP)
- Programmable resistor with eraseless memory (PREM)
- Progressive breakdown
- System on chip (SOC)