A novel basic unit level rate control algorithm and architecture for H.264/AVC video encoders

Bing Tsung Wu*, Tzu Chun Chang, Jiun-In  Guo, Ching Lung Su

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Rate control (RC) techniques play an important role for interactive video coding applications, especially in video streaming applications with bandwidth constraints. Among the RC algorithms in H.264 reference software JM, the basic unit (BU)-level RC algorithm achieves better video quality than frame-level one. However, the inherent sequential processing in H.264 BU-level RC algorithm makes it difficult to be realized in a pipelined H.264 hardware encoder without increasing the processing latency. In this paper we propose a new H.264 BU-level rate control algorithm and the associated architecture by exploiting a new predictor model to predict the MAD value and target bits for hardware realization. The proposed algorithm breaks down the sequential processing dependence in the original H.264 RC algorithm and reduces up to 80.6% of internal buffer size for H.264 D1 video encoding, while maintaining good video quality.

Original languageEnglish
Title of host publicationProceedings of APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
Pages1300-1303
Number of pages4
DOIs
StatePublished - 1 Dec 2008
EventAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Macao, China
Duration: 30 Nov 20083 Dec 2008

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

ConferenceAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
CountryChina
CityMacao
Period30/11/083/12/08

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    Wu, B. T., Chang, T. C., Guo, J-I., & Su, C. L. (2008). A novel basic unit level rate control algorithm and architecture for H.264/AVC video encoders. In Proceedings of APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (pp. 1300-1303). [4746266] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2008.4746266