A novel 3D integration scheme for backside illuminated CMOS image sensor devices

Cheng Ta Ko, Zhi Cheng Hsiao, Hsiang Hung Chang, Dian Rong Lyu, Chao Kai Hsu, Huan Chun Fu, Chun Hsien Chien, Wei Chung Lo, Kuan-Neng Chen

Research output: Contribution to journalArticle

9 Scopus citations

Abstract

A novel backside-illuminated CMOS image sensor (BSI-CIS) scheme and process are developed and demonstrated. This innovative scheme can be realized without fusion oxide bonding and through-silicon via (TSV) fabrication. This wafer-level TSV-less BSI-CIS scheme includes transparent ultrathin silicon ∼3.6 μm and uses several bonding technologies. The characterization and assessment results indicate that the integration scheme possesses excellent electrical integrity and reliability. In addition, good quality results of the image functional test demonstrate the excellent performance of this scheme. This novel scheme also provides a realizable low-cost solution for the next-generation CIS and further 3-D novel BSI-CIS scheme.

Original languageEnglish
Article number6774458
Pages (from-to)715-720
Number of pages6
JournalIEEE Transactions on Device and Materials Reliability
Volume14
Issue number2
DOIs
StatePublished - 1 Jan 2014

Keywords

  • 3D integration
  • backside illuminated
  • CMOS image sensor

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    Ko, C. T., Hsiao, Z. C., Chang, H. H., Lyu, D. R., Hsu, C. K., Fu, H. C., Chien, C. H., Lo, W. C., & Chen, K-N. (2014). A novel 3D integration scheme for backside illuminated CMOS image sensor devices. IEEE Transactions on Device and Materials Reliability, 14(2), 715-720. [6774458]. https://doi.org/10.1109/TDMR.2014.2311887